PXR40RM Datasheet, PDF (577/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Direct Memory Access Controller (eDMA)
21.5.4.4 Fixed-Group Arbitration, Round-Robin Channel Arbitration
The highest priority group with a request is serviced. Lower priority groups are serviced if no pending
requests exist in the higher priority groups.
Within each group, channels are serviced starting with the highest channel number and rotating through to
the lowest channel number without regard to the channel priority levels assigned within the group.
This scenario could cause the same bandwidth consumption problem as indicated in Section 21.5.4.1,
Fixed-Group Arbitration, Fixed-Channel Arbitration, but all the channels in the highest priority group get
serviced. Service latency is short on the highest priority group, but could potentially get longer and longer
as the group priority decreases.
21.5.5 DMA Transfer
21.5.5.1 Single Request
To perform a simple transfer of n bytes of data with one activation, set the major loop to 1
(EDMA_x_TCD.CITER = EDMA_x_TCD.BITER = 1). The data transfer begins after the channel service
request is acknowledged and the channel is selected to execute. After the transfer is complete, the
EDMA_x_TCD.DONE bit is set and an interrupt is generated if properly enabled.
For example, the following TCD entry is configured to transfer 16 bytes of data. The eDMA is
programmed for one iteration of the major loop transferring 16 bytes per iteration. The source memory has
a byte wide memory port located at 0x1000. The destination memory has a word wide port located at
0x2000. The address offsets are programmed in increments to match the size of the transfer; one byte for
the source and four bytes for the destination. The final source and destination addresses are adjusted to
return to their beginning values.
EDMA_x_TCD.CITER = EDMA_x_TCD.BITER = 1
EDMA_x_TCD.NBYTES = 16
EDMA_x_TCD.SADDR = 0x1000
EDMA_x_TCD.SOFF = 1
EDMA_x_TCD.SSIZE = 0
EDMA_x_TCD.SLAST = –16
EDMA_x_TCD.DADDR = 0x2000
EDMA_x_TCD.DOFF = 4
EDMA_x_TCD.DSIZE = 2
EDMA_x_TCD.DLAST_SGA = –16
EDMA_x_TCD.INT_MAJ = 1
EDMA_x_TCD.START = 1 (Must be written last after all other fields have been initialized)
All other TCD fields = 0
This would generate the following sequence of events:
1. Slave write to the EDMA_x_TCD.START bit requests channel service.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
21-53