PXR40RM Datasheet, PDF (151/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Power Management Controller (PMC)
= Trimmed
Vref
Band Gap
VDDREG
PWM
Controller
VDDREG
SMPS MODE
SI3460
Regulator
Select
VDDREG
VRC1p2
VRCTRL
REGSEL
VDDREG
NJD
2873
VDD
Max 1.2A@1.2V
Decoupling
PMC 1.2V Regulator
External Components
LDO MODE
Figure 5-7. Internal Regulator 1.2V LDO and SMPS diagram
5.5.7 1.2V VDD LVD
A user programmable low voltage detector (LVD) monitors the core supply voltage VDD.
Rising LVD threshold voltage is documented under LVD12 symbol in the PXR40 Microcontroller Data
Sheet.
The assertion and negation voltages are adjustable via software by writing to the LVDCTRIM field of the
PMC_TRIMR register, which selects one of the 16 voltages available through the appropriate tapped
output. The reset value of the 4-bit register is “0110”, corresponding to the nominal LVD12 voltage.
When an internal regulator (SMPS or LDO) is used to generate the core voltage supply, it is required to
change the field of the register to “1100” before increasing core logic clock frequency.
LVD scaled voltage can be measured via ADC by selecting the respective channel reported in Table 5-8.
During this measurement, the output of the LVD is temporarily forced to low level so that false events,
which may be caused by ADC reading, are discarded.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
5-19