PXR40RM Datasheet, PDF (250/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

System Integration Unit (SIU)
Field
29
30–31
EBDF
Table 7-44. SIU_ECCR Bit Field Descriptions
Description
Reserved
External bus division factor. Specifies the frequency ratio between the system clock and
the external clock, CLKOUT. Do not change EBDF during an external bus access or while
an access is pending. The CLKOUT frequency is divided from the system clock frequency
according to the descriptions below. When operating in full mode (1:1), set the divider to
0b01 (divide-by-2).
00 Divide by 1
01 Divide by 2
10 Divide by 3
11 Divide by 4
7.3.1.25 Compare B Register High (SIU_CBRH)
The SIU_CBRH holds the 32-bit value that is compared against the public password in flash
(0xFEED_FACE_CAFE_BEEF). The CMPBH field is read/write and is reset by the internal reset
condition.
Address: SIU_BASE + 0x0990
Access: R/W
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
R
CMPBH
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
CMPBH
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 7-23. Compare B Register High (SIU_CBRH)
7-68
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor