English
Language : 

PXR40RM Datasheet, PDF (805/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller
Enhanced Modular Input/Output Subsystem (eMIOS200)
23.4.3.1 Effect of Freeze on the STAC Client Submodule
When the FRZ bit in the EMIOS_MCR is set and the module is in debug mode, the operation of the STAC
client submodule is not affected; that is, there is no freeze function in this submodule.
23.4.4 Global Clock Prescaler Submodule (GCP)
The GCP divides the system clock to generate a clock for the clock prescalers (CP) of the unified channels.
It is a programmable 8-bit up counter. The main clock signal is prescaled by the value defined in the GPRE
bits in EMIOS_MCR. The output is clocked every time the counter overflows. Counting is enabled by
setting the GPREN bit in the EMIOS_MCR. The counter can be stopped at any time by clearing this bit,
thereby stopping the internal counter in all the unified channels.
In order to ensure safe working and avoid glitches the following steps must be performed whenever any
update in the prescaling rate is desired:
1. Write 0 at GPREN bit in EMIOSMCR register, thus disabling global prescaler;
2. Write the desired value for prescaling rate at GPRE[0:7] bits in EMIOSMCR register;
3. Enable global prescaler by writing 1 at GPREN bit in EMIOSMCR register.
The prescaler is not disabled during either freeze state or negated GTBE input.
23.4.4.1 Effect of Freeze on the GCP
When the FRZ bit in the EMIOS_MCR register is set and the module is in debug mode, the operation of
GCP submodule is not affected, i.e., there is no freeze function in this submodule.
23.5 Reset
The eMIOS200 is reset by the global asynchronous system reset signal.
The MDIS bit in the EMIOS_MCR register is cleared during reset.
On resetting the eMIOS200 all unified channels enter GPIO input mode.
23.6 Interrupts
The eMIOS200 can generate one interrupt per channel. An interrupt request is generated according to the
configuration of the channel and input events or matches. See Chapter 10, Interrupts and Interrupt
Controller (INTC), for details on the eMIOS200 interrupt vectors.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
23-65