PXR40RM Datasheet, PDF (1414/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Device Performance Optimization
• Signal Processing Extension (SPE-APU)
• Variable Length Encoding (VLE)
• Compiler optimizations
Further factors that impact the overall application performance are the use of the intelligent peripherals:
• Use of DMA rather than CPU to transfer data efficiently
• Use of DMA service requests rather than CPU interrupts to avoid software polling:
• Off-loading tasks from the CPU to the eTPU2 or eDMA
• Careful allocation of cache usage for code & data ranges, particularly when using with external
memories.
Different items in this list will have different performance impacts in a real system. Features like the
system cache, the FMPLL and the flash access times tend to provide the most significant performance
impacts in terms of hardware settings.
The subsequent sections in this chapter will describe how to configure and use these features appropriately.
33.3 Configuring Hardware Features
33.3.1 Branch Target Buffer (BTB)
33.3.1.1 Description
To resolve branch instructions and improve the accuracy of branch predictions the e200z7 core implements
a dynamic branch prediction mechanism using a branch target buffer (BTB), a fully associative address
cache of branch target addresses. Its purpose is to accelerate the execution of software loops with some
potential change of flow within the loop body. In addition, the BTB on the e200z7 has a subroutine call
stack that speeds up indirect branches.
33.3.1.2 Recommended Configuration
By default, this BTB is disabled following negation of reset. It is controlled by the Branch Unit Control
and Status Register (BUCSR). The BTB’s contents should be flushed and invalidated by writing
BUCSR[BBFI]=1, and it may be enabled by subsequently writing BUCSR[BPEN]=1.
Additional control is available in BUCSR[BPRED] and BUCSR[BALLOC] to control whether forward or
backward branches (or both) are candidates for entry into the BTB, and thus for branch prediction. By
default the BUCSR[BPRED] and BUCSR[BALLOC] fields are set to 0b00, which enables forward and
backward branch prediction. It is recommended to not disable branch prediction although for extremely
fine tuning of a given application the optimum setting of BUCSR[BPRED] and BUCSR[BALLOC]
should be assessed.
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
33-2