PXR40RM Datasheet, PDF (924/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Deserial Serial Peripheral Interface (DSPI)
25.5.2 Baud Rate Settings
Table 25-36 shows the baud rate that is generated based on the combination of the baud rate prescaler PBR
and the baud rate scaler BR in the DSPI_CTAR registers. The values calculated assume a 100 MHz system
frequency and the double baud rate DBR bit is clear.
Table 25-36. Baud Rate Values
Baud Rate Divider Prescaler Values
2
4
6
8
16
32
64
128
256
512
1024
2048
4096
8192
16384
32768
2
25.0M
12.5M
8.33M
6.25M
3.12M
1.56M
781k
391k
195k
97.7k
48.8k
24.4k
12.2k
6.10k
3.05k
1.53k
3
16.7M
8.33M
5.56M
4.17M
2.08M
1.04M
521k
260k
130k
65.1k
32.6k
16.3k
8.14k
4.07k
2.04k
1.02k
5
10.0M
5.00M
3.33M
2.50M
1.25M
625k
312k
156k
78.1k
39.1k
19.5k
9.77k
4.88k
2.44k
1.22k
610
7
7.14M
3.57M
2.38M
1.79M
893k
446k
223k
112k
55.8k
27.9k
14.0k
6.98k
3.49k
1.74k
872
436
25.5.3 Delay Settings
Table 25-37 shows the values for the Delay after Transfer (t_DT) and CS to SCK Delay (T_CSC) that can be
generated based on the prescaler values and the scaler values set in the DSPI_CTAR registers. The values
calculated assume a 100 MHz system frequency.
This table does not apply for TSB Continuous Mode.
25-64
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor