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PXR40RM Datasheet, PDF (290/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller
Boot Assist Module (BAM)
The BAM configures the communication modules for reception with fixed baud rates as shown in the
Table 9-8 and waits for data reception.
.
Table 9-8. Serial Boot Mode — Baud Rate and Watchdog Summary1
Crystal
Frequency
(MHz)
System
Clock
Frequency
(MHz)
Desired Actual eSCI
Baud Rate Baud Rate
(baud)
(baud)
CAN Baud
Rate
(baud)
Core Watchdog
Timeout
period2
(s)
SWT Timeout
period during
serial boot3
(s)
fxtal
fsys = 1.5*fxtal
—
fsys / 1248
fsys / 60
2.5 * 227 / fsys
2.5 * 227 / fxtal
8
12
9600
9615
200k
27.96
41.9
12
18
14400
14423
300k
18.64
28
16
24
19200
19230
400k
13.98
21
20
30
24000
24038
500k
11.18
40
60
48000
48077
1000k
16.8
8.4
1 With the PLL in normal mode and crystal oscillator as a reference clock source.
2 The core WD is disabled during serial boot and is then enabled after serial boot finishes (with timeouts indicated
here)
3 The SWT is enabled during serial boot, but disabled after serial boot finishes.
If a message containing 8 bytes with ID 0x11 is received by the CAN controller first, the BAM program:
• Transitions to serial CAN boot mode
• Disables the eSCI
• Configures RXD_A to its reset state
• Transitions to the CAN serial download protocol routine
If a byte from eSCI is received first, the BAM program:
• Transitions to the Serial SCI Boot sub-mode
• Disables CAN_A module
• Configures CAN_A’s pins to their reset state
• Transitions to the SCI serial download protocol routine
9.5.5.1 CAN Controller Configuration in the Fixed Baud Rate Mode
The CAN controller is configured to operate at a baud rate equal to system frequency divided by 60, using
the standard 11 bit identifier format detailed in CAN 2.0A specification. See Table 9-8 for examples of
baud rates. Only one message buffer 0 is used for all communications.
The bit timing is configured as shown in Figure 9-6.
9-10
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor