PXR40RM Datasheet, PDF (108/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

5 _{MH = High voltage, medium speed}
F = Fast speed
FS = Fast speed with slew
AE = Analog with ESD protection circuitry (up/down = pull up and pull down circuits included in the pad)
VHV = Very high voltage
6 _{VDDE (fast I/O) and VDDEH (slow I/O) power supply inputs are grouped into segments. Each segment of VDDEH pins can connect to a separate 3.3–5.0 V}
(+5%/–10%) power supply input. Each segment of VDDE pins can connect to a separate 1.8–3.3 V (±10%) power supply.
7 _{The Status During Reset pin is sampled after the internal POR is negated. Prior to exiting POR, the signal has a high impedance. The terminology used in}
this column is: O – output, I – input, Up – weak pull up enabled, Down – weak pulldown enabled, Low – output driven low, High – output driven high, ABS —
Auto Baud Select (during Reset or until JCOMP assertion). A dash on the left side of the slash denotes that both the input and output buffers for the pin are
off. A dash on the right side of the slash denotes that there is no weak pull up/down enabled on the pin. The signal name to the left or right of the slash indicates
the pin is enabled.
8 _{The Function After Reset of a GPI function is general purpose input. A dash on the left side of the slash denotes that both the input and output buffers for the}
pin are off. A dash on the right side of the slash denotes that there is no weak pull up/down enabled on the pin.
9 _{This signal name includes eTPU_C functionality that this device does not have. This is for forward compatibility with devices that have an eTPU_C.}
10 _{During and just after POR negates, internal pull resistors can be enabled, resulting in as much as 4 mA of current draw. The pull resistors are disabled when}
the system clock propagates through the device.
11 _{NMI does not have a PCR PA configuration; it is enabled when NMI is enabled through the SIU_IREER and SIU_IFEER registers.}
12 _{Nexus reset is different than system reset; MDO 1-11 are enabled when trace (RPM or FPM) is enabled, and MDO 12-15 when FPM trace is enabled. MSEO}
and MCKO are also dependent on trace (RPM or FPM) being enabled.
13 _{The Nexus pins don’t have a “primary” function as they are not configured by the SIU. The pins are selected by asserting JCOMP and configuring the NPC.}
SIU values have no effect on the function of these pins once enabled.
14 _{MCKO is disabled from reset; it can be enabled from the tool (controlled by Nexus NPC_PCR register).}
Refer to the PXR40 Microcontroller Data Sheet for ball-map figures.