PXR40RM Datasheet, PDF (528/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Direct Memory Access Controller (eDMA)
21.3 Memory Map and Registers
This section provides a detailed description of all eDMA registers.
21.3.1 Module Memory Map
The eDMA memory map is shown in Table 21-1. The address of each register is given as an offset to the
eDMA base address. Registers are listed in address order, identified by complete name and mnemonic, and
list the type of accesses allowed. In register names, an “x” is used to indicate A or B, depending on which
eDMA’s register you are using. If a register only exists in one of the eDMAs, the register description will
state that.
The eDMA’s programming model is partitioned into two regions: the first region defines a number of
registers providing control functions; however, the second region corresponds to the local transfer control
descriptor memory.
Some registers are implemented as two 32-bit registers, and include H and L suffixes, signaling the high
and low portions of the control function.
Base addresses of eDMA_x:
• EDMA_A_BASE = 0xFFF4_4000
• EDMA_B_BASE = 0xFFF5_4000
Table 21-1. eDMA Memory Map
Offset from
EDMA_x_BASE
Register
Bits Access Reset Value Section/Page
0x0000
0x0004
0x0008
0x000C
0x0010
0x0014
0x0018
0x0019
0x001A
0x001B
0x001C
0x001D
EDMA_x_MCR—eDMA module control register
32
EDMA_x_ESR—eDMA error status register
32
EDMA_A_ERQRH—eDMA_A enable request high register 32
(channels 63–32)
Reserved (eDMA_B)
EDMA_x_ERQRL—eDMA enable request low register
32
(channels 31–00)
EDMA_A_EEIRLH—eDMA_A enable error interrupt register 32
(channels 63–32)
Reserved (eDMA_B)
EDMA_x_EEIRL—eDMA enable error interrupt register
32
(channels 31–00)
EDMA_x_SERQR—eDMA set enable request register
8
EDMA_x_CERQR—eDMA clear enable request register
8
EDMA_x_SEEIR—eDMA set enable error interrupt register 8
EDMA_x_CEEIR—eDMA clear enable error interrupt register 8
EDMA_x_CIRQR—eDMA clear interrupt request register
8
EDMA_x_CER—eDMA clear error register
8
R/W 0x0000_E400 21.3.2.1/21-13
R 0x0000_0000 21.3.2.2/21-17
R/W 0000_0000 21.3.2.3/21-19
R/W 0x0000_0000 21.3.2.3/21-19
R/W 0x0000_0000 21.3.2.4/21-21
R/W 0x0000_0000 21.3.2.4/21-21
W
0x00
21.3.2.5/21-23
W
0x00
21.3.2.6/21-24
W
0x00
21.3.2.7/21-25
W
0x00
21.3.2.8/21-26
W
0x00
21.3.2.9/21-27
W
0x00
21.3.2.10/21-27
21-4
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor