PXR40RM Datasheet, PDF (192/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

System Integration Unit (SIU)
Address
SIU_BASE+0x0D74
SIU_BASE+0x0D78
SIU_BASE+0x0D7C–
SIU_BASE+0x0DFF
SIU_BASE+0x0E00–
SIU_BASE+0x0FDC
Table 7-5. SIU Memory Map (continued)
Register
Bits Access Reset Value Section/Page
SIU_EMIOSD—DSPID eMIOS Select 32 R/W 0x0000_0000 7.3.1.34/7-84
Register
SIU_DSPIDHLD—DSPIC
SIU_DSPICH/L Select Register
32 R/W 0x0000_0000 7.3.1.34/7-84
Reserved
SIU_GPDI0–SIU_GPDI511—GPIO
Pin Data Input Register 0–511
8
R
0x0U
7.3.1.35/7-86
7.3.1 Register Descriptions
7.3.1.1 MCU ID Register (SIU_MIDR)
The SIU_MIDR contains the part identification number and mask revision number specific to the device.
The part number is a read-only field that is mask programmed with the part number of the device. The part
number changes depending on the module versions contained in a device. The part number does not
change for bug fixes or process changes.
The mask number is a read-only field that is mask programmed with the specific mask revision level of
the device. The current value applies to revision 0 and is updated for each mask revision.
The MCU ID register is 32 bits. Figure 7-2 shows the MCU ID register values.
7-10
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor