PXR40RM Datasheet, PDF (1179/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Time Processing Unit (eTPU2)
• Channel logic can now work on full eTPU clock, allowing faster response with slow clocks.
• Added a new User Programmable Channel Mode: the blocking, enabling, service request and
capture characteristics of this channel mode can be programmed via microcode. Refer to the eTPU
Reference Manual for details.
• Microinstructions now provide an option to issue Interrupt and Data Transfer requests selected by
CHAN. They can also be requested simultaneously at the same instruction. Refer to the eTPU
Reference Manual for details.
• Channel Flags 0 and 1 can now be tested for branching, besides selecting the entry point. Refer to
the eTPU Reference Manual for details.
• Channel digital filters can be bypassed, and can be clocked by full eTPU clock (Section 29.3.4.4.4,
Bypass Mode).
• Scheduler priority-passing mechanism can now be disabled (Section 29.3.3.2.2, Priority Passing
Disabling).
• New Watchdog mechanism kills threads over a programmable timeout (Section 29.3.1, Watchdog).
• New counter allows microengine load information collection for performance analysis
(Section 29.3.7.1, Idle Counter).
• Channels 1 and 2 (besides channel 0) can now be selected to control the EAC (Section 29.2.6.1,
ETPUTBCR - eTPU Time Base Configuration Register).
• Timebase prescalers are now reset when the GTBE input is negated, guaranteeing synchronization
with eMIOS in all cases (Section 29.3.5.4, GTBE - Global Time Base Enable).
• New MISC flag indicates when an SCM signature calculation round is completed. This allows
measuring of the average MISC scan period in a real application situation (Section 29.2.5.1,
ETPUMCR - eTPU Module Configuration Register).
• New channel TCCEA flag allows continuous capture even after TDLA is set, making it fully
compatible with TPU behavior. Refer to the eTPU Reference Manual for details.
• New branch condition PRSS tells the pin state at the time when a channel (match or transition)
service request occurred. Refer to the eTPU Reference Manual for details.
• MRLEA/B can now be negated independently by microcode. Refer to the eTPU Reference Manual
for details.
• New Engine Relative address mode allows a function to access SDM address space common to one
engine, but distinct between engines. Refer to the eTPU Reference Manual for details.
NOTE
All changes above are backward compatible with the classic eTPU, so that
legacy object code (both Host and microcode) runs on eTPU2 without
modification.
29.1.3 Modes of Operation
eTPU can be seen as capable of working in the following modes:
• User Configuration Mode
Freescale Semiconductor
PXR40 Microcontroller Reference Manual, Rev. 1
29-11