PXR40RM Datasheet, PDF (1102/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Queued Analog-to-Digital Converter (EQADC)
Step Two: Configure the DMAC to handle data transfers between the CQueues/RQueues in RAM and the
CFIFOs/RFIFOs in the EQADC.
1. For transferring, set the source address of the DMAC to point to the start address of CQueue1. Set
the destination address of the DMAC to point to EQADC_CFPR1. Refer to Section 27.6.2.3,
EQADC CFIFO Push Registers (EQADC_CFPR).
2. For receiving, set the source address of the DMAC to point to EQADC_RFPR3. Refer to
Section 27.6.2.4, EQADC Result FIFO Pop Registers (EQADC_RFPR). Set the destination address
of the DMAC to point to the starting address of RQueue1.
Step Three: Configure the EQADC Control Registers.
3. Configure Section 27.6.2.6, EQADC Interrupt and DMA Control Registers (EQADC_IDCR).
a. Set EOQIE1 to enable the End of Queue Interrupt request.
b. Set CFFS1 and RFDS3 to configure the EQADC to generate DMA requests to push commands
into CFIFO1 and to pop result data from RFIF03.
c. Set CFINV1 to invalidate the contents of CFIFO1.
d. Set RFDE3 and CFFE1 to enable the EQADC to generate DMA requests. Command transfers
from the RAM to the CFIFO1 will start immediately.
e. Set RFOIE3 to indicate if RFIFO3 overflows.
f. Set CFUIE1 to indicate if CFIFO1 underflows.
4. Configure MODE1 to continuous-scan rising edge external trigger mode in Section 27.6.2.5,
EQADC CFIFO Control Registers (EQADC_CFCR).
Step Four: Command transfer to ADCs and Result data reception.
When an external rising edge event occurs for CFIFO1, the EQADC automatically will begin
transferring commands from CFIFO1 when it becomes the highest priority CFIFO trying to send
commands to CBuffer1. The received results will be placed in RFIFO3 and then moved to RQueue1
by the DMAC.
27.8.2 EQADC/DMAC Interface
This section provides an overview about the EQADC/DMAC interface and general guidelines about how
the DMAC should be configured in order for it to correctly transfer data between the queues in system
memory and the EQADC FIFOs.
NOTE
Advanced DMACs provide more functionality then the ones discussed in
this section.
27.8.2.1 CQueue/CFIFO Transfers
In transfers involving CQueues and CFIFOs, the DMAC moves data from a queued source to a single
destination as showed in Figure 27-74. The location of the data to be moved is indicated by the source
27-120
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor