PXR40RM Datasheet, PDF (1224/1434 Pages) Freescale Semiconductor, Inc – PXR40 Microcontroller

Enhanced Time Processing Unit (eTPU2)
29.3.3.2 Channel Priority Schemes
The Scheduler holds a Service Grant register with one bit for each channel. Once the Scheduler grants a
time slot to channel, the Service Grant bit for that channel is asserted in the Service Grant register. When
the Service Grant bit of a channel is set, the channel may request new service but is not serviced again
before its Service Grant bit is cleared.
When all channels in a same priority level are serviced, their Service Grant bits are cleared at the end of
the thread, one eTPU clock before the next serviced channel is calculated, according to the scheme below¹:
• Clear all grant bits of priority High if all channels of that priority that are requesting have their grant
bits in 1.
• Clear all grant bits of priority Medium if all channels of that priority that are requesting have their
grant bits in 1.
• Clear all grant bits of priority Low if all channels of that priority that are requesting have their grant
bits in 1.
• Clear all grant bits of disabled channels.
This scheme assures that no channel is left with its grant bit forever asserted (preventing it from being
serviced again), even if the channel priorities are reassigned during the execution.
Priority level is determined based on the maximum latency desired for each channel. A channel having a
Function that requires the most frequent or more immediate service should be allocated a high priority
level.
The eTPU employs a primary and a secondary priority scheme. These two schemes ensure frequent
servicing of high-demand Functions and ensure a minimum time allocation to all channels requesting
service, regardless of their priority level. The primary scheme prioritizes requesting channels that have
different priority levels; the secondary scheme prioritizes requesting channels that have the same priority
level.
Initially, a channel requests service and is granted a time slot by the Scheduler: Service Grant bit is
asserted. If only high-level channels constantly receive service first because of their priority level, middle-
and low-level channels would only be serviced by default, i.e., if no high-level channels request service.
To ensure that each priority level receives an opportunity for servicing, every time slot has a fixed priority
level that the Scheduler honors first. Divided into sets of seven, time slots are numbered from one to seven.
Figure 29-27 illustrates the numbered time slots in sets of seven (fields A and B) and identifies their
assigned default priority level. The high level has more time slots than the middle and low levels. Out of
every seven time slots available, four are assigned to honor high-level channels first, two are assigned to
honor middle-level channels first, and one is assigned to honor low-level channels first. Only one request
(in each Engine) is serviced per time slot. When no channel requests service and the microengine is idle
the priority scheme is initialized to time slot one, to prevent priority inversion on the next request².
1. Grant bits are also cleared in the next clock, when the service channel is chosen, or when the microengine is idle, using
the same scheme.
2. Priority inversion would occur in the following situation: no channel is requesting service, and the current time slot is
primarily assigned to a low-priority channel. If the Scheduler was not reset to time slot one and two channels requested
service at the same time, one with high priority and the other with low priority, the channel to be serviced would be the
low-priority channel.
29-56
PXR40 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor