PXS20RM Datasheet, PDF (967/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Memory Protection Unit (MPU)
Offset MPU_Base + 0x400 + (16*n) + 0xc (MPU_RGDn.Word3)
Access: R/W
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
PID
W
PIDMASK
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0V
L
D
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 30-8. MPU Region Descriptor, Word 3 Register (MPU_RGDn.Word3)
Table 30-9. MPU_RGDn.Word3 field descriptions
Field
Description
0–7 Process Identifier. This 8-bit field specifies that the optional process identifier is to be included in the
PID determination of whether the current access hits in the region descriptor. This field is combined with
the PIDMASK and included in the region hit determination if MPU_RGDn.Word2[MxPE] is set.
8–15
PIDMASK
Process Identifier Mask. This 8-bit field provides a masking capability so that multiple process
identifiers can be included as part of the region hit determination. If a bit in the PIDMASK is set, then
the corresponding bit of the PID is ignored in the comparison. This field is combined with the PID and
included in the region hit determination if MPU_RGDn.Word2[MxPE] is set. For more information on
the handling of the PID and PIDMASK, see Section 30.7.1.1, Access evaluation – hit determination.
31
Valid. This bit signals the region descriptor is valid. Any write to MPU_RGDn.Word{0,1,2} clears this
VLD bit, while a write to MPU_RGDn.Word3 sets or clears this bit depending on bit 31 of the write operand.
0 Region descriptor is invalid
1 Region descriptor is valid
30.6.5 MPU Region Descriptor Alternate Access Control n
(MPU_RGDAACn)
As noted in Section 30.6.4.3, MPU Region Descriptor n, Word 2 (MPU_RGDn.Word2), it is expected that
since system software may adjust only the access controls within a region descriptor
(MPU_RGDn.Word2) as different tasks execute, an alternate programming view of this 32-bit entity is
desired. If only the access controls are being updated, this operation should be performed by writing to
MPU_RGDAACn (Alternate Access Control n) as stores to these locations do not affect the descriptor’s
valid bit.
The memory address therefore provides an alternate location for updating MPU_RGDn.Word2.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
30-13