PXS20RM Datasheet, PDF (331/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Deserial Serial Peripheral Interface (DSPI)
NOTES:
1 _{The reset bits in the DSPI_HCR are set by configuration parameters in the chip.}
Field
PISR
CTAR
TXFR
RXFR
Table 16-4. DSPI_HCR field descriptions
Description
PISR, PISR0-3 and parallel inputs frame positions selection logic are implemented for the module.
0 - DSPI_PISR0-3 registers are not implemented.
1 - DSPI_PISR0-3 registers are implemented
CTAR, Maximum implemented DSPI_CTAR register number.
TXFR, Maximum implemented DSPI_TXFR register number.
RXFR, Maximum implemented DSPI_RXFR register number.
16.3.2.3 DSPI Transfer Count Register (DSPI_TCR)
The DSPI_TCR contains a counter, that indicates the number of SPI transfers made. The transfer counter
is intended to assist in queue management. Do not write the DSPI_TCR, when the DSPI is in the Running
state.
Address: DSPI_BASE + 0x8
Access:
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R
SPI_TCNT
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 16-6. DSPI Transfer Count Register (DSPI_TCR)
Table 16-5. DSPI_TCR Field Descriptions
Field
Description
0–15
SPI Transfer Counter. The SPI_TCNT field counts the number of SPI transfers the DSPI makes. The
SPI_TCNT[0:15] SPI_TCNT field increments every time the last bit of a SPI frame is transmitted. A value written to
SPI_TCNT presets the counter to that value. SPI_TCNT is reset to zero at the beginning of the frame
when the CTCNT field is set in the executing SPI command. The Transfer Counter ‘wraps around’ i.e.
incrementing the counter past 65535 resets the counter to zero.
16–31
Reserved, should be cleared.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
16-11