PXS20RM Datasheet, PDF (821/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexRay Communication Controller
Table 26-98. Receive Message Buffer Slot Status Field Descriptions (continued)
Field
Description
VFA
SYA
NFA
SUA
SEA
CEA
BVA
Valid Frame on Channel A — protocol related variable: vSS!ValidFrame channel A
0 vSS!ValidFrame = 0
1 vSS!ValidFrame = 1
Sync Frame Indicator Channel A — protocol related variable: vRF!Header!SyFIndicator channel A
0 vRF!Header!SyFIndicator = 0
1 vRF!Header!SyFIndicator = 1
Null Frame Indicator Channel A — protocol related variable: vRF!Header!NFIndicator channel A
0 vRF!Header!NFIndicator = 0
1 vRF!Header!NFIndicator = 1
Startup Frame Indicator Channel A — protocol related variable: vRF!Header!SuFIndicator channel A
0 vRF!Header!SuFIndicator = 0
1 vRF!Header!SuFIndicator = 1
Syntax Error on Channel A — protocol related variable: vSS!SyntaxError channel A
0 vSS!SyntaxError = 0
1 vSS!SyntaxError = 1
Content Error on Channel A — protocol related variable: vSS!ContentError channel A
0 vSS!ContentError = 0
1 vSS!ContentError = 1
Boundary Violation on Channel A — protocol related variable: vSS!BViolation channel A
0 vSS!BViolation = 0
1 vSS!BViolation = 1
Transmit Message Buffer Slot Status Description
This section describes the slot status structure for transmit message buffers. Only the TCA and TCB status
bits are directly related to the transmission process. All other status bits in this structure are related to a
receive process that may have occurred. The content of the slot status structure for transmit message
buffers depends on the channel assignment as given by Table 26-99.
Table 26-99. Transmit Message Buffer Slot Status Content
Transmit Message Buffer Type
Individual Transmit Message Buffer assigned to both channels
FR_MBCCFRn[CHA]=1 and FR_MBCCFRn[CHB]=1
Individual Transmit Message Buffer assigned to channel A
FR_MBCCFRn[CHA]=1 and FR_MBCCFRn[CHB]=0
Individual Transmit Message Buffer assigned to channel B
FR_MBCCFRn[CHA]=0 and FR_MBCCFRn[CHB]=1
Slot Status Content
see Figure 26-125
see Figure 26-126
see Figure 26-127
The meaning of the bits in the slot status structure is described in Table 26-98.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R VFB SYB NFB SUB SEB CEB BVB TCB VFA SYA NFA SUA SEA CEA BVA TCA
Reset –
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Figure 26-125. Transmit Message Buffer Slot Status Structure (ChAB)
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
26-109