PXS20RM Datasheet, PDF (1193/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Register Protection (REG_PROT)
Clears the User Access Allowed Bit UAA in the GCR register associated with the module identified by
the given base address <base>. When cleared, this bit denies any write access to the protected module in
user mode and generates a transfer error in case of an attempt to write a protected register.
USER_ACCESS_ALLOWED(base)
Sets the User Access Allowed Bit UAA in the GCR register associated with the module identified by the
given base address <base>. When set, this bit permits write accesses to the protected module in user mode
when the corresponding register are not additionally protected by other means.
Finally, two more macros are provided to permit direct access to the registers in the register protection
gasket using the same semantic as other register definitions in the device specific header file:
LOCK_SLB(thereg)
provides the content of the soft lock bit register associated with the register <thereg>; the parameter
<thereg> must be the name of the corresponding module register using the notation in the device specific
header file.
LOCK_GCR(base)
provides the content of the Global Configuration Register GCR for the block identified by its base address
<base>; the parameter <base> must be the base address of the corresponding block.
40.6
PXS20 registers under protection
Table 40-5. PXS20 register protection
Module
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
ADC_0
Register
MCR
IMR
CIMR0
WTIMR
eDMAE
eDMAR0
THRHLR0
THRHLR1
THRHLR2
THRHLR3
PSCR
PSR0
CTR0
NCMR0
JCMR0
PDEDR
THRHLR4
Size
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Offset
0x0
0x20
0x24
0x34
0x40
0x44
0x60
0x64
0x68
0x6C
0x80
0x84
0x94
0xA4
0xB4
0xC8
0x280
Protect size
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
32-bit
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
40-11