PXS20RM Datasheet, PDF (1047/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

31.12 Functional description
LIN Controller (LINFlexD)
31.12.1 8-bit timeout counter
31.12.1.1 LIN timeout mode
The timeout counter can be used to monitor LIN frames timing as well as problems on the LIN bus such as:
• Bus stuck at dominant state
• Header timeout
• No bus activity
• Slave not responding error (in Master mode)
• Wake-up timeout
The header timeout and response timeout values can be tuned in the LINTOCR register. The LINTOCR
reset value corresponds to T_{Header_max}, T_{Response_max} and T_{Frame_max} defined in the LIN Standard.
If the LINTCSR[LTOM] = 1, OC1 and OC2 output compare values in the LINOCR register are
automatically updated.¹
OC1 is used to check T_Header and T_Response and OC2 is used to check T_Frame (refer to Figure 31-55).
When LINFlexD moves from Break state to Break Delimiter state (refer to LINSR register):
• OC1 is updated with the value of OC_Header (OC_Header = CNT + HTO),
• OC2 is updated with the value of OC_Frame (OC_Frame = CNT + HTO + RTO x 9 (frame timeout
value for an 8-byte frame)),
• The TOCE bit is set.
On the start bit of the first data byte of the response (and if no error occurred during the header reception),
OC1 is updated with the value of OC_Response (OC_Response = CNT + RTO x 9 (response timeout value for
an 8-byte frame)).
When BIDR[DFL] is updated (and if no error occurred during the header reception), OC1 and OC2 are
automatically updated to check T_Response and T_Frame according to RTO (tolerance) and DFL.
On the checksum reception or in case of error in the header or data field, the TOCE bit is cleared.
This configuration is used to detect header timeout and response timeout.
1. The LINOCR register is read-only.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
31-71