PXS20RM Datasheet, PDF (1294/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Semaphore Unit (SEMA4)
43.4.1 Semaphore usage
Example 1: Inter-processor communication done with software interrupts and semaphores...
• The e200z4d_1 uses software interrupts to tell the e200z4d_0 that new data is available, or the
e200z4d_0 does the same to tell the e200z4d_1 that there is new data available for transmission.
• Because only eight software interrupts are available, the user may need RAM locations or
general-purpose registers in the SIU to refine the meaning of the software interrupt.
• Messages are passed between cores in a defined section of system RAM.
• Before a core updates a message, it must check the associated semaphore to see if the other core is
in the process of updating the same message. If the RAM not being updated, then the semaphore
must first be locked, then the message can be updated. A software interrupt can be sent to the other
core and the semaphore can be unlocked. If the RAM is being updated, the CPU must wait for the
other core to unlock the semaphore before proceeding with update.
• Using the same memory location for bidirectional communication might be difficult, so two
one-way message areas might work better.
— For example, if both cores want to update the same location, then the following sequence may
occur.
1. The e200z4d_1 locks the semaphore, updates the memory, unlocks the semaphore, and
generates a software interrupt to the e200z4d_0.
2. Before the e200z4d_0 takes the software interrupt request, it finds the semaphore to be
unlocked, so it writes new data to the memory.
3. The e200z4d_0 software interrupt ISR reads the data sent to the e200z4d_1, not the data sent
from the e200z4d_1, and performs an incorrect operation.
— Semaphores do not prevent this situation from occurring.
Example 2: Coherent read done with semaphores...
• The e200z4d_0 wants to coherently read a section of shared memory.
• The e200z4d_0 should check that the semaphore for the shared memory is not currently set.
• The e200z4d_0 should set the semaphore for the shared memory to prevent the e200z4d_1 from
updating the shared memory.
• The e200z4d_0 reads the required data, then unlock the semaphore.
43.5 Initialization information
The reset state of the SEMA4 unit allows it to begin operation without the need for any further
initialization. All the internal state machines are cleared by any reset event, allowing the unit to
immediately begin operation.
43.6 Application information
In an operational multi-core system, most interactions involving the SEMA4 unit involves reads and writes
to the SEMA4_GATEn registers for implementation of the hardware-enforced software gate functions.
Typical code segments for gate functions perform the following operations:
43-12
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor