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PXS20RM Datasheet, PDF (1360/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller
Wakeup Unit (WKPU)
51.2 External signal description
The NMI input pin can be used as a non-maskable interrupt source in normal run mode or as a chip wakeup
source during STOP0 mode.
NOTE
Be aware that the Wakeup pins are enabled in ALL modes. Therefore, the
Wakeup pins should be correctly terminated to ensure minimal current
consumption. Any unused Wakeup signal input should be terminated by
using an external pull-up or pull-down.
51.3 Memory map and register description
This section provides a detailed description of all registers accessible in the WKPU module.
51.3.1 Memory map
Figure 51-1 gives an overview on the WKPU registers implemented.
Table 51-1. WKPU memory map
Address Offset
0x0000
0x0004 - 0x0007
0x0008
0x000C - 0x3FFF
Use
NMI Status Flag Register
Reserved
NMI Configuration Register
Reserved
Abbreviation
Size
Supported
Access Sizes
NSR
32
32/16/8
NCR
32
32/16/8
NOTE
Reserved registers will read as 0, writes will have no effect. If supported and
enabled by the chip, a transfer error will be issued when trying to access
completely reserved register space.
51.3.2 Register descriptions
This section describes in address order all the WKPU registers. Each description includes a standard
register diagram with an associated figure number. Details of register bit and field function follow the
register diagrams, in bit order.
Figure 51-2. Key to Register Fields
Always 1 Always 0 R/W BIT Read- BIT Write-
Write 1 BIT Self-clear 0 N/A
reads 1
reads 0
bit
only bit
only bit BIT to clear w1c
bit BIT
51.3.2.1 NMI Status Flag Register (NSR)
This register holds the non-maskable interrupt status flags.
51-2
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor