PXS20RM Datasheet, PDF (226/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Clock Generation Module (MC_CGM)
Address0xC3FE_0385
Access: User read, Supervisor read/write, Test read/write
0
1
2
3
4
5
6
7
R
0
0
0
DE1
W
DIV1
Reset
1
0
0
0
0
0
0
0
Figure 11-8. Auxiliary Clock 0 Divider Configuration Register 1 (CGM_AC0_DC1)
These registers control the auxiliary clock 0 dividers.
Table 11-8. Auxiliary Clock 0 Divider Configuration Registers (CGM_AC0_DC0…1) field descriptions
Field
Description
DE0
DIV0
DE1
DIV1
Divider 0 Enable
0 Disable auxiliary clock 0 divider 0
1 Enable auxiliary clock 0 divider 0
Divider 0 Division Value — The resultant motor control clock will have a period DIV0 + 1 times that of
auxiliary clock 0. If the DE0 is set to 0 (Divider 0 is disabled), any write access to the DIV0 field is ignored
and the motor control clock remains disabled.
Divider 1 Enable
0 Disable auxiliary clock 0 divider 1
1 Enable auxiliary clock 0 divider 1
Divider 1 Division Value — The resultant sine wave generator clock will have a period DIV1 + 1 times that
of auxiliary clock 0. If the DE1 is set to 0 (Divider 1 is disabled), any write access to the DIV1 field is ignored
and the sine wave generator clock remains disabled.
11.3.1.7 Auxiliary Clock 1 Select Control Register (CGM_AC1_SC)
Address 0xC3FE_0388
Access: User read, Supervisor read/write, Test read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
0
0
0
W
SELCTL
0
0
0
0
0
0
0
0
Reset 0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 11-9. Auxiliary Clock 1 Select Control Register (CGM_AC1_SC)
This register is used to select the current clock source for the following clocks:
• undivided: (unused)
• divided by auxiliary clock 1 divider 0: FlexRay clock
11-12
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor