PXS20RM Datasheet, PDF (1253/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

power-on
or enabled
‘destructive’
reset
enabled
non-shortened
external or
‘functional’
reset¹
Reset Generation Module (MC_RGM)
PHASE0
duration  3 16 MHz internal RC oscillator clock cycles
VREG and 16 MHz internal RC oscillator stabilization done
PHASE1
duration  350 16 MHz internal RC oscillator clock cycles
PHASE2
duration 16 MHz internal RC oscillator clock cycles
flash initialization done
enabled
shortened
external or
‘functional’
reset
PHASE3
duration 4016 MHz internal RC oscillator clock cycles
RESET_B released
trimming, self-test configuration, and FCCU initialization
done
IDLE
Figure 41-11. MC_RGM State Machine
41.4.1.1 PHASE0 Phase
This phase is entered immediately from any phase on a power-on or enabled ‘destructive’ reset event. The
reset state machine exits PHASE0 and enters PHASE1 on verification of the following:
• all enabled ‘destructive’ resets have been processed
• all processes that need to be done in PHASE0 are completed
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
41-21