PXS20RM Datasheet, PDF (220/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Clock Generation Module (MC_CGM)
Table 11-2. MC_CGM memory map (continued)
Address
Name
0xC3FE_0370 CGM_OC_EN
0 1 2 3 27 5 6 7 8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
EN
W
0xC3FE_0374 CGM_OCDS_SC R 0 0 _SELDI
W
V
SELCTL
00000000
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
0xC3FE_0378 CGM_SC_SS
R 0 0 0 0 SELSTAT 0 0 0 0 0 0 0 0
W
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
0xC3FE_037C CGM_SC_DC0 R
W
000
DIV0
00000000
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
0xC3FE_0380 CGM_AC0_SC
R0 0 0 0
W
SELCTL
00000000
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
0xC3FE_0384 CGM_AC0_DC0… R
1
W
000
DIV0
000
DIV1
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
0xC3FE_0388 CGM_AC1_SC
R0 0 0 0
W
SELCTL
00000000
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
0xC3FE_038C CGM_AC1_DC0 R
W
000
DIV0
00000000
R0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
11-6
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor