PXS20RM Datasheet, PDF (290/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Cyclic Redundancy Checker (CRC) Unit
14.5.4 CRC Output Register (CRC_OUTP)
Offset: 0xC + (N–1)0x10
Access: User read
0
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R
OUTP[31:16]
W
Reset 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
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R
OUTP[15:0]
W
Reset 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Figure 14-6. CRC Output Register (CRC_OUTP)
Table 14-5. CRC_OUTP field descriptions
Field
OUTP
Description
Final CRC signature
The OUTP register includes the final signature corresponding to the CRC_CSTAT register value
eventually swapped and inverted.
In case of CRC-CCITT polynomial only the16 LSB bits are significative. The 16 MSB bits are tied at 0b
during the computation.
This register can be read by the software.
14.6 Functional description
The CRC module supports the CRC computation for each context. Each context has a own complete set
of registers including the CRC engine. The data flow of each context can be interleaved. The data stream
can be structured as a sequence of byte, half-words or words. The input data sequence is provided,
eventually mixing the data formats (byte, half-word, word), writing to the input data register (CRC_INP).
The data stream is generally executed by N concurrent DMA data transfers (mem2mem) where N is less
or equal to the number of contexts (3).
Three standard generator polynomials are given in Equation 14-1 through Equation 14-3 for the CRC
computation of each context.
X⁸ + X⁴ + X³ + X² + 1
CRC-8 (cut2/3 only)
Eqn. 14-1
X¹⁶ + X¹² + X⁵ + 1
CRC-CCITT (x25 protocol)
Eqn. 14-2
14-6
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor