PXS20RM Datasheet, PDF (1248/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Reset Generation Module (MC_RGM)
Table 41-7. Functional Event Alternate Request Register (RGM_FEAR) Field Descriptions
Field
Description
AR_CMU12_ Alternate Request for CMU1/2 clock freq. too high/low
FHL
0 Generate a SAFE mode request on a CMU1/2 clock freq. too high/low event if the reset is disabled
1 Generate an interrupt request on a CMU1/2 clock freq. too high/low event if the reset is disabled
AR_PLL1
Alternate Request for PLL1 fail
0 Generate a SAFE mode request on a PLL1 fail event if the reset is disabled
1 Generate an interrupt request on a PLL1 fail event if the reset is disabled
AR_FCCU_S Alternate Request for FCCU SAFE mode request
AFE
0 Generate a SAFE mode request on a FCCU SAFE mode request event if the reset is disabled
AR_CMU0_F Alternate Request for system clock freq. too high/low
HL
0 Generate a SAFE mode request on a system clock freq. too high/low event if the reset is disabled
1 Generate an interrupt request on a system clock freq. too high/low event if the reset is disabled
AR_CMU0_ Alternate Request for oscillator freq. too low
OLR
0 Generate a SAFE mode request on a oscillator freq. too low event if the reset is disabled
1 Generate an interrupt request on a oscillator freq. too low event if the reset is disabled
AR_PLL0
Alternate Request for PLL0 fail
0 Generate a SAFE mode request on a PLL0 fail event if the reset is disabled
1 Generate an interrupt request on a PLL0 fail event if the reset is disabled
AR_CWD
Alternate Request for core watchdog reset
0 Generate a SAFE mode request on a core watchdog reset event if the reset is disabled
1 Generate an interrupt request on a core watchdog reset event if the reset is disabled
41.3.1.6 Functional Event Short Sequence Register (RGM_FESS)
Address 0xC3FE_4018
Access: User read, Supervisor read/write, Test read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
W
Reset^* 0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
* _{This register is reset if and only if one of thefollowing occurs:}
• Power up
• 1.2 V low-voltage detection (i.e. when the core voltage drops below the point at which the flip-flops can reliably retain
their value)
Figure 41-9. Functional Event Short Sequence Register (RGM_FESS)
This register defines which reset sequence will be done when a functional reset sequence is triggered. The
functional reset sequence can either start from PHASE1 or from PHASE3, skipping PHASE1 and
PHASE2.
41-16
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor