PXS20RM Datasheet, PDF (583/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Flash Memory
Offset 0x3DE0
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
SC
W
Reset 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
CW
W
Reset 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0
Figure 23-21. Nonvolatile System Censoring Information register (NVSCI) for cut2/3
The Nonvolatile System Censoring Information register (NVSCI) stores the censorship control word of
the device. It is read during the reset phase of the flash memory module and the protection mechanisms
are activated consequently. The devices are delivered uncensored to the user.
Table 23-21. NVSCI field descriptions
Field
Description
SC
Serial Censorship control word.
These bits represent the Serial Censorship Control Word (SCCW).
If SC[15:0] = 0x55AA, the Public Access is disabled.
If SC[15:0]  0x55AA, the Public Access is enabled.
CW
Censorship control Word.
These bits represent the Censorship Control Word (CCW).
If CW = 0x55AA, the Censored Mode is disabled.
If CW  0x55AA, the Censored Mode is enabled.
23.1.7 User option bits
Table 23-22 describes the user option bits on this device. These are programmed in the BIU4 register (see
Section 23.1.6.8, Bus Interface Unit 4 Register (BIU4)) and verified using the UOPS register in the SSCM
(see Section 48.3.1.8, User Option Status Register (UOPS)).
Table 23-22. User option bits
Bit number
Function name
Description
31–20
19–10
FCCU_CFG
FCCU configuration
Bits 26–31: FCCU_CFG.FOP
Bits 23–25: FCCU_CFG.FOM
Bit 22: FCCU_CFG.PS
Bit 21: FCCU_CFG.SM
Bit 20: FCCU_CFG.CM
Reserved
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
23-33