PXS20RM Datasheet, PDF (877/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexRay Communication Controller
26.6.20.2.2 Transmit Message Buffer Interrupt
The Transmit Message Buffer Interrupt request is generated when at least one of the individual transmit
message buffers generates an interrupt request MBXIRQ[n] and the interrupt enable bit FR_GIFER[TBIE]
is asserted.
26.6.20.2.3 Protocol Interrupt
The Protocol Interrupt request is generated when at least one of the individual protocol interrupt sources
generates an interrupt request and the interrupt enable bit FR_GIFER[PRIE] is set.
26.6.20.2.4 CHI Interrupt
The CHI Interrupt request is generated when at least one of the individual chi error interrupt sources
generates an interrupt request and the interrupt enable bit FR_GIFER[CHIE] is set.
26.6.20.2.5 Module Interrupt
The Module Interrupt request is generated if at least one of the combined interrupt sources generates an
interrupt request and the interrupt enable bit FR_GIFER[MIE] is set.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
26-165