PXS20RM Datasheet, PDF (696/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Flexible Motor Control Pulse Width Modulator Module (FlexPWM)
DISB - PWMB Fault Disable Mask
Each of the four bit of this read/write field is one-to-one associated with the four FAULTx inputs. The
PWMB output will be turned off if there is a logic 1 on a FAULTx input and a 1 in the corresponding
bit of the DISB field. A reset sets all DISB bits.
DISA - PWMA Fault Disable Mask
Each of the four bit of this read/write field is one-to-one associated with the four FAULTx inputs. The
PWMA output will be turned off if there is a logic 1 on a FAULTx input and a 1 in the corresponding
bit of the DISA field. A reset sets all DISA bits.
25.4.3.17 Deadtime Count Registers (DTCNT0, DTCNT1)
Deadtime operation is only applicable to complementary channel operation. The 12-bit values written to
these registers are in terms of IPBus clock cycles regardless of the setting of PRSC and/or CLK_SEL.
Reset sets the deadtime count registers to a default value of 0x0FFF, selecting a deadtime of 4095 IPBus
clock cycles. These registers are not byte accessible.
PWM_SUB_
BASE+$24
0
Read
0
Write
Reset
0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0000
DTCNT0
00001111111 1
Figure 25-51. Deadtime Count Register 0 (DTCNT0)
111
PWM_SUB_
BASE+$26
0
Read
0
Write
Reset
0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
0000
DTCNT1
00001111111 1
Figure 25-52. Deadtime Count Register 1 (DTCNT1)
111
The DTCNT0 field is used to control the deadtime during 0 to 1 transitions of the PWMA output (assuming
normal polarity). The DTCNT1 field is used to control the deadtime during 0 to 1 transitions of the
complementary PWMB output.
25.4.3.18 Capture Control X Register (CAPTCTRLX)
PWM_SUB
_BASE+$3
0
Read
Write
Reset
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
CX1CNT
CX0CNT
CFXWM
EDG _{INP_}
CNT
X_E
N
SEL
X
EDGX1
EDGX0
00000000000000
Figure 25-53. Capture Control X Register (CAPTCTRLX)
ONE
ARM
SHO _X
TX
00
25-50
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor