PXS20RM Datasheet, PDF (1265/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Self-Test Control Unit (STCU)
Table 42-2. STCU register map
Offset from
STCU_BASE
(0xC3FF_4000)¹
Register Name
Access²
Location
0x0000–0x0004 Reserved
0x0008
(cut1)
Reserved
0x0008
(cut2/3)
STCU SK Code Register (STCU_SKC)
W
on page 42-8
0x000C
(cut1)
STCU Configuration Register (STCU_CFG)
R
on page 42-9
0x000C
(cut2/3)
Reserved
0x0010–0x0018 Reserved
0x001C
STCU Error Register (STCU_ERR)
R [cut1] on page 42-9
R/W [cut2/3]
0x0020
(cut1)
Reserved
0x0020
(cut2/3)
STCU Error Key Register (STCU_ERRK)
W
on page 42-11
0x0024
STCU LBIST Status Register (STCU_LBS)
R
on page 42-12
0x0028
STCU LBIST End Flag Register (STCU_LBE)
R
on page 42-13
0x002C–0x0038 Reserved
0x003C
STCU MBIST Status Low Register (STCU_MBSL)
R
on page 42-13
0x0040
STCU MBIST Status High Register (STCU_MBSH)
R
on page 42-14
0x0044
STCU MBIST End Flag Low Register (STCU_MBEL)
R
on page 42-15
0x0048
STCU MBIST End Flag High Register (STCU_MBEH)cut2/3
R
on page 42-15
0x004C–0x0084 Reserved
0x0088
(cut1)
Reserved
0x0088 + (n × 0x20) STCU LBIST MISR Expected Low Register
(cut2/3)
(STCU_LB_MISREL)
R
on page 42-16
0x008C
(cut1)
Reserved
0x008C + (n × 0x20) STCU LBIST MISR Expected High Register
(cut2/3)
(STCU_LB_MISREH)
R
on page 42-17
0x0090 + (n × 0x20) STCU LBIST MISR Read Low Register (STCU_LB_MISRRL)
R
on page 42-17
0x0094 + (n × 0x20) STCU LBIST MISR Read High Register (STCU_LB_MISRRH)
R
on page 42-18
0x0098–0x7FFF Reserved
NOTES:
1 _{n is a variable representing the repeated register blocks of the multiple LBISTs and MBISTs: n ranges from 0 to 2.}
2 _{In this column, R/W = Read/Write, R = Read-only, and W = Write-only.}
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
42-7