PXS20RM Datasheet, PDF (556/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Flash Memory
7. Write a logic 0 to the MCR[EHV] bit.
8. If more addresses are to be programmed, return to step 2.
9. Write a logic 0 to the MCR[PGM] bit to terminate the program sequence.
The first write after a program is initiated determines the page address to be programmed. Program may
be initiated with the 0 to 1 transition of the MCR[PGM] bit or by clearing the MCR[EHV] bit at the end
of a previous program. This first write is referred to as an interlock write. The interlock write determines
if the shadow or normal array space is to be programmed by sampling chip-specific shadow enable and
causing MCR[PEAS] to be set/cleared.
In the case of an erase-suspended program, the values in MCR[PEAS] may be modified via the program
interlock write, enabling erase-suspended programs to and from shadow space.
An interlock write must be performed before setting EHV. The user may terminate a program sequence by
clearing MCR[PGM] prior to setting MCR[EHV].
After the interlock write, additional writes only affect the data to be programmed at the word location
determined by address bits [3:2]. Unwritten locations default to a data value of 0xffff_ffff. If multiple
writes are done to the same location the data for the last write is used in programming.
While DONE is low, EHV is high and PSUS is low the user may clear EHV, resulting in a program abort.
A program abort forces the module to step 8 of the program sequence. An aborted program results in PEG
being set low, indicating a failed operation. The data space being operated on before the abort contains
indeterminate data. The user may not abort a program sequence while in program suspend.
CAUTION
Aborting a program operation leaves the FC addresses being programmed
in an indeterminate data state. This may be recovered by executing an erase
on the affected blocks.
23.1.5.4 Software Locking
A software mechanism is provided to independently lock/unlock each high, mid, and low address space
against program and erase.
Software Locking is done through the LBL (Low/Mid Address Space Block Lock) or HBL (High Address
Space Block Lock) registers. These can be written through register writes, and can be read through register
reads.
23.1.5.5 C90FL Program Suspend/Resume
The program sequence may be suspended to allow read access to the FC. It is not possible to erase during
a program suspend, or program during a program suspend. Read While Write may also be used to read
the array during a program sequence providing the read is to a different partition.
A program suspend can be initiated by changing the value of the MCR[PSUS] bit from a 0 to a 1.
MCR[PSUS] can be set high at any time when MCR[PGM] and MCR[EHV] are high. A 0 to 1 transition
of MCR[PSUS] causes the flash module to start the sequence to enter program suspend, which is a read
state. The user must wait until MCR[DONE] = 1 before the module is suspended. At this time FC reads
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PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor