PXS20RM Datasheet, PDF (299/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

15.3 XBAR registers
This section provides information on XBAR registers.
Crossbar Switch (XBAR)
15.3.1 Register summary
There are four registers that reside in each slave port of the XBAR and one register that resides in each
master port of the XBAR. These registers are IP bus compliant registers. Read and write transfers both
require two IP bus clock cycles. The registers can only be read from and written to in supervisor mode.
Additionally, these registers can only be read from or written to by 32-bit accesses.
The registers are fully decoded and an error response is returned if an unimplemented location is accessed
within the XBAR.
The slave registers also feature a bit, which when written with a 1, will prevent the registers from being
written to again. The registers will still be readable, but future write attempts will have no effect on the
registers and will be terminated with an error response.
The memory map for the XBAR program-visible registers is shown in Table 15-4. Table 15-5 shows the
XBAR register summary.
Table 15-4. XBAR register configuration summary
XBAR base offset
0x000
0x010
0x100
0x110
0x200
0x210
0x300
0x310
0x400
0x410
0x500
0x510
0x600
0x610
0x700
0x710
0x800
0x900
0xA00
0xB00
0xC00
0xD00
0xE00
0xF00
Register
MPR0
SGPCR0
MPR1
SGPCR1
MPR2
SGPCR2
MPR3
SGPCR3
MPR4
SGPCR4
MPR5
SGPCR5
MPR6
SGPCR6
MPR7
SGPCR7
MGPCR0
MGPCR1
MGPCR2
MGPCR3
MGPCR4
MGPCR5
MGPCR6
MGPCR7
Use
Master Priority Register for Slave port 0
General Purpose Control Register for Slave port 0
Master Priority Register for Slave port 1
General Purpose Control Register for Slave port 1
Master Priority Register for Slave port 2
General Purpose Control Register for Slave port 2
Master Priority Register for Slave port 3
General Purpose Control Register for Slave port 3
Master Priority Register for Slave port 4
General Purpose Control Register for Slave port 4
Master Priority Register for Slave port 5
General Purpose Control Register for Slave port 5
Master Priority Register for Slave port 6
General Purpose Control Register for Slave port 6
Master Priority Register for Slave port 7
General Purpose Control Register for Slave port 7
General Purpose Control Register for Master port 0
General Purpose Control Register for Master port 1
General Purpose Control Register for Master port 2
General Purpose Control Register for Master port 3
General Purpose Control Register for Master port 4
General Purpose Control Register for Master port 5
General Purpose Control Register for Master port 6
General Purpose Control Register for Master port 7
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
15-5