PXS20RM Datasheet, PDF (701/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

25.4.4.2 Mask Register (MASK)
Flexible Motor Control Pulse Width Modulator Module (FlexPWM)
PWM_BASE
+$142
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Read
Write
0000
MASKA
MASKB
MASKX
Reset
0000000000000000
Figure 25-60. Mask Register (MASK)
NOTE
The MASKx bits are double buffered and do not take effect until a
FORCE_OUT event occurs within the appropriate submodule. Refer to
Figure 25-17 to see how FORCE_OUT is generated. Reading the MASK
bits reads the buffered value and not necessarily the value currently in effect.
MASKA - PWMA Masks
These bits mask the PWMA outputs of each submodule forcing the output to logic 0 prior to
consideration of the output polarity.
1 = PWMA output masked.
0 = PWMA output normal.
MASKB - PWMB Masks
These bits mask the PWMB outputs of each submodule forcing the output to logic 0 prior to
consideration of the output polarity.
1 = PWMB output masked.
0 = PWMB output normal.
MASKX - PWMX Masks
These bits mask the PWMX outputs of each submodule forcing the output to logic 0 prior to
consideration of the output polarity.
1 = PWMX output masked.
0 = PWMX output normal.
25.4.4.3 Software Controlled Output Register (SWCOUT)
PWM_BASE
+$144
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Read
Write
0 0 0 0 0 0 0 0 _{OUT OUT OUT OUT OUT OUT OUT OUT}
23_3 45_3 23_2 45_2 23_1 45_1 23_0 45_0
Reset
0000000000000000
Figure 25-61. Software Controlled Output Register (SWCOUT)
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
25-55