PXS20RM Datasheet, PDF (346/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Deserial Serial Peripheral Interface (DSPI)
Table 16-17. DSPI_RXFRn Field Descriptions
Field
Description
0–31
Receive Data. The RXDATA field contains the received SPI data.
RXDATA[0:31]
16.4 Functional description
The DSPI block supports full-duplex, synchronous serial communications between MCUs and peripheral
devices. The DSPI can also be used to reduce the number of pins required for I/O by serializing and
deserializing up to 32 Parallel Input/Output signals. All communications are done with SPI-like protocol.
The DSPI has one configuration:
• SPI Configuration in which the DSPI operates as a basic SPI or a queued SPI.
The DSPI_MCR[DCONF] field determines the DSPI Configuration. See Table 16-3 for the DSPI
configuration values.
The DSPI_CTAR0 - DSPI_CTAR3 registers hold clock and transfer attributes (see Section 16.3.2.4, DSPI
Clock and Transfer Attributes Registers 0–3 (DSPI_CTAR0–DSPI_CTAR3)). The SPI configuration
allows to select which CTAR to use on a frame by frame basis by setting a field in the SPI command. See
Section 16.3.2.4, DSPI Clock and Transfer Attributes Registers 0–3 (DSPI_CTAR0–DSPI_CTAR3), for
information on the fields of the DSPI_CTAR registers.
Typical master to slave connections are shown in the Figure 16-20. When a data transfer operation is
performed, data is serially shifted a predetermined number of bit positions. Because the modules are
linked, data is exchanged between the master and the slave. The data that was in the master shift register
is now in the shift register of the slave, and vice versa. At the end of a transfer, the TCF bit in the DSPI_SR
is set to indicate a completed transfer.
DSPI Master
Shift Register
Baud Rate
Generator
SIN
SOUT
SCK
SOUT
SIN
SCK
DSPI Slave
Shift Register
PCSx
SS
Figure 16-20. SPI Serial Protocol Overview
Generally more than one slave device can be connected to the DSPI master. Eight Peripheral Chip Select
(PCS) signals of the DSPI masters can be used to select which of the slaves to communicate with.
The three DSPI configurations share transfer protocol and timing properties which are described
independently of the configuration in Section 16.4.4, Transfer formats. The transfer rate and delay settings
are described in Section 16.4.3, DSPI baud rate and clock delay generation.
16-26
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor