PXS20RM Datasheet, PDF (740/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexRay Communication Controller
26.5.2.14 Protocol Interrupt Flag Register 1 (FR_PIFR1)
Base + 0x001A
Write: Normal Mode
0
1
2
3
4
5
6
7
8
R EMC IPC PECF PSC SSI3 SSI2 SSI1 SSI0
_IF _IF _IF _IF _IF _IF _IF _IF
0
9
10
11
12
13
14
15
0
EVT ODT
_IF _IF
0
0
0
0
W w1c w1c w1c w1c w1c w1c w1c w1c
w1c w1c
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-14. Protocol Interrupt Flag Register 1 (FR_PIFR1)
The register holds one set of the protocol-related individual interrupt flags.
Table 26-19. FR_PIFR1 field descriptions
Field
Description
EMC_IF
IPC_IF
PECF_IF
PSC_IF
SSI3_IF
SSI2_IF
SSI1_IF
SSI0_IF
EVT_IF
ODT_IF
Error Mode Changed Interrupt Flag — This flag is set when the value of the ERRMODE bit field
in the Protocol Status Register 0 (FR_PSR0) is changed by the CC.
0 No such event.
1 ERRMODE field changed.
Illegal Protocol Control Command Interrupt Flag — This flag is set when the PE tries to execute
a protocol control command, which was issued via the POCCMD field of the Protocol Operation
Control Register (FR_POCR), and detects that this protocol control command is not allowed in the
current protocol state. In this case the command is not executed. For more details, see
Section 26.7.6, Protocol Control Command Execution.
0 No such event.
1 Illegal protocol control command detected.
Protocol Engine Communication Failure Interrupt Flag — This flag is set if the CC has detected
a communication failure between the protocol engine and the CC host interface
0 No such event.
1 Protocol Engine Communication Failure detected.
Protocol State Changed Interrupt Flag — This flag is set when the protocol state in the
PROTSTATE field in the Protocol Status Register 0 (FR_PSR0) has changed.
0 No such event.
1 Protocol state changed.
Slot Status Counter Incremented Interrupt Flag — Each of these flags is set when the
SLOTSTATUSCNT field in the corresponding Slot Status Counter Registers
(FR_SSCR0–FR_SSCR3) is incremented.
0 No such event.
1 The corresponding slot status counter has incremented.
Even Cycle Table Written Interrupt Flag — This flag is set if the CC has written the sync frame
measurement / ID tables into the FlexRay memory area for the even cycle.
0 No such event.
1 Sync frame measurement table written
Odd Cycle Table Written Interrupt Flag — This flag is set if the CC has written the sync frame
measurement / ID tables into the FlexRay memory area for the odd cycle.
0 No such event.
1 Sync frame measurement table written
26-28
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor