PXS20RM Datasheet, PDF (327/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Deserial Serial Peripheral Interface (DSPI)
Table 16-2. DSPI memory map
Address offset
Register name
Location
0x0
DSPI Module Configuration Register (DSPI_MCR)
on page 16-7
0x4
DSPI Hardware Configuration Register (DSPI_HCR)¹ [cut2/3 only] on page 16-10
0x8
DSPI Transfer Count Register (DSPI_TCR)
on page 16-11
0xC–0x18
DSPI Clock and Transfer Attributes Register 0 (DSPI_CTAR0) -
DSPI Clock and Transfer Attributes Register 3(DSPI_CTAR3)
on page 16-12
0x2C
DSPI Status Register (DSPI_SR)
on page 16-17
0x30
DSPI DMA/Interrupt Request Select and Enable Register (DSPI_RSER) on page 16-19
FIFO Registers
0x34
DSPI Push TX FIFO Register (DSPI_PUSHR)
on page 16-21
0x38
DSPI Pop RX FIFO Register (DSPI_POPR)
on page 16-24
0x3C–0x4C
DSPI Transmit FIFO Register 0 (DSPI_TXFR0) -
DSPI Transmit FIFO Register 4 (DSPI_TXFR4)
on page 16-24
0x7C - 0x8C
DSPI Receive FIFO Register 0 (DSPI_RXFR0) -
DSPI Receive FIFO Register 4 (DSPI_RXFR4)
on page 16-25
NOTES:
1 _{The DSPI_HCR register provides parametization information about particular instance of the DSPI module.}
16.3.2 Register descriptions
16.3.2.1 DSPI Module Configuration Register (DSPI_MCR)
The DSPI_MCR contains bits that configure various attributes associated with DSPI operation. The HALT
and MDIS bits can be changed at any time, but only take effect on the next frame boundary. Only the HALT
and MDIS bits in the DSPI_MCR are allowed to be changed, while the DSPI is in the Running state.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
16-7