PXS20RM Datasheet, PDF (603/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexCAN Module
• Maskable interrupts
• Independent of the transmission medium (an external transceiver is assumed)
• Short latency time due to an arbitration scheme for high-priority messages
• Low power modes, with programmable wake up on bus activity
NOTE
The individual Rx Mask per Message Buffer feature may not be available in
low cost MCUs. Please consult the specific MCU documentation to find out
if this feature is supported.
24.1.3 Modes of operation
The FlexCAN module has four functional modes: Normal Mode (User and Supervisor), Freeze Mode,
Listen-Only Mode and Loop-Back Mode. There are also two low power modes: Disable Mode and Stop
Mode.
24.1.3.1 Normal Mode (User or Supervisor)
In Normal Mode, the module operates receiving and/or transmitting message frames, errors are handled
normally and all the CAN Protocol functions are enabled. User and Supervisor Modes differ in the access
to some restricted control registers.
24.1.3.2 Freeze Mode
It is enabled when the FRZ bit in the MCR Register is asserted. If enabled, Freeze Mode is entered when
the HALT bit in MCR is set or when Debug Mode is requested at MCU level. In this mode, no transmission
or reception of frames is done and synchronicity to the CAN bus is lost. See Section 24.4.9.1, Freeze
Mode, for more information.
24.1.3.3 Listen-Only Mode
The module enters this mode when the LOM bit in the Control Register is asserted. In this mode,
transmission is disabled, all error counters are frozen and the module operates in a CAN Error Passive
mode. Only messages acknowledged by another CAN station will be received. If FlexCAN detects a
message that has not been acknowledged, it will flag a BIT0 error (without changing the REC), as if it was
trying to acknowledge the message.
24.1.3.4 Loop-Back Mode
The module enters this mode when the LPB bit in the Control Register is asserted. In this mode, FlexCAN
performs an internal loop back that can be used for self test operation. The bit stream output of the
transmitter is internally fed back to the receiver input. The Rx CAN input pin is ignored and the Tx CAN
output goes to the recessive state (logic ‘1’). FlexCAN behaves as it normally does when transmitting and
treats its own transmitted message as a message received from a remote node. In this mode, FlexCAN
ignores the bit sent during the ACK slot in the CAN frame acknowledge field to ensure proper reception
of its own message. Both transmit and receive interrupts are generated.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
24-3