PXS20RM Datasheet, PDF (1060/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Mode Entry Module (MC_ME)
Table 32-1. MC_ME mode descriptions (continued)
Name
Description
Entry
Exit
TEST
RUN0…3
HALT0
STOP0
This is a chip-wide service mode which is intended to
provide a control environment for device software testing.
software request
from DRUN
system reset
assertion, DRUN
via software
These are software running modes where most processing
activity is done. These various run modes allow to enable
different clock & power configurations of the system with
respect to each other.
software request
from DRUN or
other RUN0…3,
interrupt event
from HALT0,
interrupt or wakeup
event from STOP0
system reset
assertion, SAFE
via software or
hardware failure,
other RUN0…3
modes, HALT0,
STOP0 via
software
This is a reduced-activity low-power mode during which the
clock to the core is disabled. It can be configured to switch
off analog peripherals like clock sources, flash, main
regulator, etc. for efficient power management at the cost of
higher wakeup latency.
software request
from RUN0…3
system reset
assertion, SAFE
on hardware
failure, RUN0…3
on interrupt event
This is an advanced low-power mode during which the
clock to the core is disabled. It may be configured to switch
off most of the peripherals including clock sources for
efficient power management at the cost of higher wakeup
latency.
software request
from RUN0…3
system reset
assertion, SAFE
on hardware
failure, RUN0…3
on interrupt event
or wakeup event
32.2 External signal description
The MC_ME has no connections to any external pins.
32.3 Memory map and register definition
The MC_ME contains registers for:
• mode selection and status reporting
• mode configuration
• mode transition interrupts status and mask control
• scalable number of peripheral sub-mode selection and status reporting
32-4
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor