PXS20RM Datasheet, PDF (1173/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Power Management Unit (PMU)
The supported bipolar transistor are the BCP68 (ON Semiconductor) and the BCX68 (Infineon).
Immediately after power-on reset, the PMU trims the output voltage using factory-specified parameters.
The nominal target output after this trimming is 1.28 V.
The stabilization for HPREG is achieved using an external capacitance. The minimum required value is
two 6 F capacitors.
NOTE
The aforementioned minimum external capacitance value has to take into
account the tolerance, temperature, voltage and aging variation. Be sure to
limit the series inductance per pad to less than 13 nH.
39.4 High- and low-voltage detectors (HVD, LVD)
Two kind of LVDs are available:
• LVD_MAIN (3 blocks) for the 3.3V input supply with thresholds at 3.3 V level
• LVD_DIG for the 1.2 V output voltage
LVD_MAIN_1 senses the VDDIO supply and provides information to the system if VDDIO is not in the
proper range. If the voltage is not in the proper range, the system responds with a reset.
LVD_MAIN_2 senses the VDDREG supply and provides information to the system if VDDREG is not in
the proper range. If the voltage is not in the proper range, the system responds with a reset.
LVD_MAIN_3 senses the VDDFLASH supply and provides information to the system if VDDFLASH is
not in the proper range. If the voltage is not in the proper range, the system responds with a reset.
The LVD_DIG_MAIN and LVD_DIG_BKUP blocks sense the HPREG output and provides information
to the system if the output is not in the proper range. If the output is not in the proper range, the system
responds with a reset.
The HVD_DIG_MAIN and HVD_DIG_BKUP blocks also sense the HPREG output and provides
information to the system if the output is not in the proper range. If the output is not in the proper range,
the system responds with a reset.
The POR is required to initialize the device during supply rise. The POR works only on the rising edge of
main supply. To ensure its functioning during the following rising edge of the supply, it is reset by the
output of either of MAIN_LVD_1 or MAIN_LVD_2 or MAIN_LVD_3. When main supply reaches below
the lower voltage threshold of any of these LVDs, POR is reset and ready to work on next rising edge.
When supply is below the POR threshold, POR output will be high and will follow the supply. When
sufficient supply threshold is reached, POR will trigger and give ‘0’ level as output
39.4.1 Current comparator
This block mirrors a portion of the current flowing through the internal ballast. This current is compared
with a reference current. If this ballast current is more than the reference current, the output of the block
is logic “0” which indicates that there is no external NPN available on the board. In reverse case the output
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
39-3