PXS20RM Datasheet, PDF (1123/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Nexus Crossbar Slave Port Data Trace Module (NXSS) [cut2/3 only]
• Using the WT[DTS] field to enable data trace on watchpoint hits
33.6.5.2 DTM queueing
NXSS_0 and NXSS_1 implement a programmable depth queue for queuing all messages. Messages that
enter the queue are transmitted via the auxiliary pins in the order in which they are queued.
NOTE
If multiple trace messages must be queued at the same time, watchpoint
messages have the highest priority (WPM  DTM).
33.6.5.3 Relative addressing
The relative address feature is compliant with IEEE-ISTO Nexus 5001-2003 and is designed to reduce the
number of bits transmitted for addresses of data trace messages.
33.6.5.4 Data trace windowing
Data write/read messages are enabled via the RWT1(2) field in the data trace control register (DTC) for
each DTM channel. Data trace windowing is achieved via the address range defined by the DTEA and
DTSA registers and by the RC1(2) field in the DTC. All read/write accesses by the selected AHB Master
ID (See DTC register for more details) that fall inside or outside these address ranges, as programmed, are
candidates to be traced.
33.7 Watchpoint support
The NXSS_0 and NXSS_1 module provides watchpoint messaging via the auxiliary pins, as defined by
IEEE-ISTO 5001-2003.
Watchpoint messages can be generated using the NXSS_0 and NXSS_1 defined internal watchpoints.
33.7.1 Watchpoint messaging
Enabling watchpoint messaging is accomplished by setting the watchpoint messaging enable bit,
DC1[WEN]. Using the BWC1 and BWC2 registers, two independently controlled internal watchpoints
can be initialized. When the selected AHB Master ID address matches on BWA1 or BWA2, a watchpoint
message is transmitted.
The Nexus module provides watchpoint messaging using the TCODE. When either of the two possible
watchpoint sources asserts, a message is sent to the queue to be messaged out. This message indicates the
watchpoint number.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
33-15