PXS20RM Datasheet, PDF (342/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Deserial Serial Peripheral Interface (DSPI)
register bits to the TX FIFO.The register structure is different in master and slave modes. In master mode
the register provides 16-bit command and 16-bit data to the TX FIFO. In slave mode all 32 register bits
can be used as data, supporting up to 32-bit SPI frame operation.
Address: DSPI_BASE + 0x34
0
1
2
3
4
5
6
R
CONT
W
CTAS
0
EOQ CTCNT
Reset 0 0 0 0 0
0
0
Access:
7
8
9
10
11
12
13
14
15
0
PCS7 PCS6 PCS5 PCS4 PCS3 PCS2 PCS1 PCS0
000000000
16
17 18 19
20
21
22
23
24
25
26
27
28
29
30
31
R
TXDATA
W
Reset 0 0 0 0 0
0
0000000000
Figure 16-14. DSPI PUSH TX FIFO Register (DSPI_PUSHR) in master mode for cut1
Address: DSPI_BASE + 0x34
0
1
2
3
4
5
6
R
W CONT
CTAS
EOQ CTCNT
Access:
7
8
9
10
11
12
13
14
15
PCS7 PCS6 PCS5 PCS4 PCS3 PCS2 PCS1 PCS0
Reset 0 0 0 0 0
0
0000000000
16
17 18 19
20
21
22
23
24
25
26
27
28
29
30
31
R
TXDATA
W
Reset 0 0 0 0 0
0
0000000000
Figure 16-15. DSPI PUSH TX FIFO Register (DSPI_PUSHR) in master mode for cut2/3
16-22
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor