PXS20RM Datasheet, PDF (1082/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Mode Entry Module (MC_ME)
32.3.2.12 RUN0…3 Mode Configuration Registers (ME_RUN0…3_MC)
Address 0xC3FD_C030 - 0xC3FD_C03C
Access: User read, Supervisor read/write, Test read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0 0 0 0 0 0 0 0 PDO 0 0
reserved FLAON
W
Reset 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
00000000
SYSCLK
W
Reset 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
Figure 32-16. RUN0…3 Mode Configuration Registers (ME_RUN0…3_MC)
This register configures system behavior during RUN0…3 modes. Please refer to Table 32-11 for details.
NOTE
Byte write accesses are not allowed to this register.
32.3.2.13 HALT0 Mode Configuration Register (ME_HALT0_MC)
Address 0xC3FD_C040
Access: User read, Supervisor read/write, Test read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0 0 0 0 0 0 0 0 PDO 0 0
reserved FLAON
W
Reset 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0 0 0 0 0 0 0 0
W
SYSCLK
Reset 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
Figure 32-17. HALT0 Mode Configuration Register (ME_HALT0_MC)
This register configures system behavior during HALT0 mode. Please refer to Table 32-11 for details.
NOTE
Byte write accesses are not allowed to this register.
32-26
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor