PXS20RM Datasheet, PDF (537/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

— System state transition: SAFE  RUN
Critical fault event (no
short or long ‘functional’
reset)
Critical fault event
Fault Collection and Control Unit (FCCU)
SW FAULT recovery
Chip mode
RUN
SAFE
RESET
SAFE
RUN
FCCU state
Short ‘functional’
reset request
SAFE mode request
NMI
NORMAL
FAULT
delay
NORMAL
FCCU_F
IDLE
ERROR ON
IDLE
FCCU reset
Figure 22-33. Critical FAULT (nesting) recovery
A typical sequence related to a critical FAULT (with non-critical fault nesting) management
(ALARM  FAULT  ALARM state), given in Figure 22-34, where the faults are recovered
sequentially, is following described:
• Non-critical fault assertion
• FCCU state transition (automatic): NORMAL  ALARM
— Alarm interrupt request
— Time-out running
• Critical fault assertion
• FCCU state transition (automatic): ALARM  FAULT
— NMI assertion
— SAFE mode request
• Chip mode transition: RUN  SAFE
• NMI interrupt management
— FAULT (CF) recovery (by SW): FCCU state transition FAULT  ALARM, because only the
critical fault has been recovered
— Chip mode transition: SAFE  RUN
— Time-out is still running
• Alarm interrupt management
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
22-37