PXS20RM Datasheet, PDF (189/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Analog-to-Digital Converter (ADC)
9.3.17.10 Self Test Data Register 2 (STDR2)
Address: Base + 0x374
Access: User read only
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
FDATA
VALI OVE
D RWR
0
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0 0 0 0
IDATA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 9-34. Self Test Data Register 2 (STDR2)
Table 9-36. STDR2 field descriptions
Field
FDATA
VALID
OVERWR
IDATA
Description
Fractional part of the ratio TEST(step1)/TEST (step0) = VDD/VBGAP for the algorithm S.
Valid data. Used to notify when the data is valid (a new value has been written). It is
automatically cleared when data is read.
Overwrite data. Used to notify when a conversion data is overwritten by a newer result. The
new data is written or discarded according to the MCR[OWREN] bit value.
Integer part of the ratio TEST(step1)/TEST (step0) = VDD/VBGAP for the algorithm S
9.3.17.11 Self Test Analog Watchdog Register 0 (STAW0R)
Address: Base + 0x380
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R _{AW WDT} 0 0
W ^{DE E}
THRH
Reset 0 0 0 0 0 1 1 1 0 0 1 0 0 1 1 1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0 0 0 0
W
THRL
Reset 0 0 0 0 0 1 0 0 1 1 0 0 0 1 0 1
Figure 9-35. Self Test Analog Watchdog Register 0 (STAW0R)
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
9-31