PXS20RM Datasheet, PDF (447/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

20.4 Memory map and register definition
Enhanced Motor Control Timer (eTimer)
20.4.1 Module memory map
Table 20-2. eTimer memory map
Address
Reg Name
Description
Timer channel registers (repeated for each channel as CHNL goes from 0 to 5)
eTimer_BASE + ($20 * CHNL) + $0
COMP1
Compare Register 1
eTimer_BASE + ($20 * CHNL) + $2
COMP2
Compare Register 2
eTimer_BASE + ($20 * CHNL) + $4
CAPT1
Capture Register 1
eTimer_BASE + ($20 * CHNL) + $6
CAPT2
Capture Register 2
eTimer_BASE + ($20 * CHNL) + $8
LOAD
Load Register
eTimer_BASE + ($20 * CHNL) + $A
HOLD
Hold Register
eTimer_BASE + ($20 * CHNL) + $C
CNTR
Counter Register
eTimer_BASE + ($20 * CHNL) + $E
CTRL1
Control Register 1
eTimer_BASE + ($20 * CHNL) + $10 CTRL2
Control Register 2
eTimer_BASE + ($20 * CHNL) + $12 CTRL3
Control Register 3
eTimer_BASE + ($20 * CHNL) + $14
STS
Status Register
eTimer_BASE + ($20 * CHNL) + $16 INTDMA
Interrupt and DMA Enable Register
eTimer_BASE + ($20 * CHNL) + $18 CMPLD1
Comparator Load Register 1
eTimer_BASE + ($20 * CHNL) + $1A CMPLD2
Comparator Load Register 2
eTimer_BASE + ($20 * CHNL) + $1C CCCTRL
Compare and Capture Control Register
eTimer_BASE + ($20 * CHNL) + $1E
FILT
Input Filter Register
eTimer_BASE + $100
eTimer_BASE + $102
Watchdog timer registers
WDTOL¹
Watchdog Time-out Low Register
WDTOH¹
Watchdog Time-out High Register
Configuration Registers
eTimer_BASE + $10C
ENBL
Channel Enable Register
eTimer_BASE + $110
DREQ0
DMA Request 0 Select Register
eTimer_BASE + $112
NOTES:
1 _{Exists only on eTimer_0}
DREQ1
DMA Request 1 Select Register
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
20-5