PXS20RM Datasheet, PDF (273/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Cross-Triggering Unit (CTU)
13.10.10 Cross triggering unit error flag register (CTUEFR)
Address: Base + 0x00C0
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
0
0
0 ^{ET_O ERR T4_ T3_ T2_ T1_ ADC_ TGS_ MRS_ ICE SM_T MRS_}
E CMP OE OE OE OE OE OSM O
O RE
R/C R/C R/C R/C R/C R/C R/C R/C R/C R/C R/C R/C
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 13-22. Cross triggering unit error flag register (CTUEFR)
Table 13-18. CTUEFR field description
Field
ET_OE
Tn_OE
ADC_OE
TGS_OSM
MRS_O
ICE
SM_TO
MRS_RE
Description
External Trigger generation Overrun Error
Timer n trigger generation Overrun Error
ADC command generation Overrun Error
TGS Overrun in Sequential Mode
Master Reload Signal Overrun
Invalid Command Error
Trigger Overrun (more than 8 EV) in TGS Sequential Mode
Master Reload Signal Reload Error
13.10.11 Cross triggering unit interrupt flag register (CTUIFR)
Address: Base + 0x00C2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
0
0
0 ^{SERR SERR ADC_ T7_I T6_I T5_I T4_I T3_I T2_I T1_I T0_I MRS_}
_B _A I
I
R/C R/C R/C R/C R/C R/C R/C R/C R/C R/C R/C R/C
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 13-23. Cross triggering unit interrupt flag register (CTUIFR)
Table 13-19. CTUIFR field descriptions
Field
Description
SERR_B
SERR_A
ADC_I
If this bit is set means that the slice time between the start of conversion and the end of
conversion is in the expected range
If this bit is set means that the slice time between the start of conversion and the end of
conversion is in the expected range
ADC command interrupt flag
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
13-27