PXS20RM Datasheet, PDF (606/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

FlexCAN Module
Table 24-2. Module Memory Map
Address
Use
Base + 0x0000
Base + 0x0004
Base + 0x0008
Base + 0x000C
Base + 0x0010
Base + 0x0014
Base + 0x0018
Base + 0x001C
Base + 0x0020
Base + 0x0024
Base + 0x0028
Base + 0x002C
Base + 0x0030
Base + 0x0034–0x005F
Base + 0x0060–0x007F
Base + 0x0080–0x017F
Base + 0x0180–0x027F
Base + 0x0280-087F
Base + 0x0880-0x08BF
Base + 0x08C0-0x08FF
Base + 0x0900-0x097F
Module Configuration (MCR)
Control Register (CTRL)
Free Running Timer (TIMER)
Reserved
Rx Global Mask (RXGMASK)
Rx Buffer 14 Mask (RX14MASK)
Rx Buffer 15 Mask (RX15MASK)
Error Counter Register (ECR)
Error and Status Register (ESR)
Reserved
Interrupt Masks 1 (IMASK1)
Reserved
Interrupt Flags 1 (IFLAG1)
Reserved
Reserved
Message Buffers MB0–MB15
Message Buffers MB16–MB31
Reserved
Rx Individual Mask Registers RXIMR0-RXIMR15
Rx Individual Mask Registers RXIMR16-RXIMR31
Reserved
Access
Type
S
S/U
S/U
Affected
by Hard
Reset
Yes
Yes
Yes
Affected
by Soft
Reset
Yes
No
Yes
S/U
Yes
No
S/U
Yes
No
S/U
Yes
No
S/U
Yes
Yes
S/U
Yes
Yes
S/U
Yes
Yes
S/U
Yes
Yes
S/U
No
No
S/U
No
No
S/U
No
No
S/U
No
No
The FlexCAN module stores CAN messages for transmission and reception using a Message Buffer
structure. Each individual MB is formed by 16 bytes mapped on memory as described in Table 24-3.
Table 24-3 shows a Standard/Extended Message Buffer (MB0) memory map, using 16 bytes total
(0x80–0x8F space).
Table 24-3. Message Buffer MB0 Memory Mapping
Address Offset
0x80
0x84
0x88–0x8F
MB Field
Control and Status (C/S)
Identifier Field
Data Field 0 – Data Field 7 (1 byte each)
24.3.2 Message Buffer Structure
The Message Buffer structure used by the FlexCAN module is represented in Figure 24-2. Both Extended
and Standard Frames (29-bit Identifier and 11-bit Identifier, respectively) used in the CAN specification
(Version 2.0 Part B) are represented.
24-6
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor