PXS20RM Datasheet, PDF (1090/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Mode Entry Module (MC_ME)
32.4.2 Mode details
32.4.2.1 RESET mode
The device enters this mode on the following events:
• from Safe, DRUN, RUN0…3, or TEST mode when the TARGET_MODE bit field of the
ME_MCTL register is written with:
— Cut1: “0000”
— Cut2/3: either “0000” for a ‘functional’ reset or “1111” for a ‘destructive’ reset
• From any mode due to a system reset by the MC_RGM because of some non-recoverable hardware
failure in the system (see the MC_RGM chapter for details)
Transition to this mode is instantaneous, and the system remains in this mode until the reset sequence is
finished. The mode configuration information for this mode is provided by the ME_RESET_MC register.
This mode has a pre-defined configuration, and the 16 MHz int. RC osc. is selected as the system clock.
32.4.2.2 DRUN mode
The device enters this mode on the following events:
• Automatically from RESET mode after completion of the reset sequence
• From RUN0…3, SAFE, or TEST mode when the TARGET_MODE bit field of the ME_MCTL
register is written with “0011”
As soon as any of the above events has occurred, a DRUN mode transition request is generated. The mode
configuration information for this mode is provided by the ME_DRUN_MC register. In this mode, the
flash, all clock sources, and the system clock configuration can be controlled by software as required. After
system reset, the software execution starts with the default configuration selecting the 16 MHz int. RC osc.
as the system clock.
This mode is intended to be used by software
• To initialize all registers as per the system needs
NOTE
Software must ensure that the code executes from RAM before changing to
this mode if the flash is configured to be in the low-power or power-down
state in this mode.
32.4.2.3 SAFE mode
The device enters this mode on the following events:
• From DRUN, RUN0…3, or TEST mode when the TARGET_MODE bit field of the ME_MCTL
register is written with “0010”
• From any mode except RESET due to a SAFE mode request generated by the MC_RGM because
of some potentially recoverable hardware failure in the system (see the MC_RGM chapter for
details)
32-34
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor