PXS20RM Datasheet, PDF (1130/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Nexus Port Controller (NPC)
34.3.2.7 TDO - Nexus Test Data Output
Test Data Output (TDO) pin transmits serial output for instructions and data. TDO is three-stateable and
is actively driven in the SHIFT-IR and SHIFT-DR controller states. TDO is updated on the falling edge of
TCK and sampled by the development tool on the rising edge of TCK.
34.3.2.8 TMS - Test Mode Select
Test Mode Select Input (TMS) pin is used to sequence the IEEE 1149.1-2001 TAP controller state
machine. TMS is sampled on the rising edge of TCK.
34.3.2.9 RDY — Data ready for transfer (on cut2/3 only)
The RDY pin, supported on cut2/3 only, exists to increase the transfer rate of the IEEE 1149.1 port. It is
used to signal when data are ready to be transferred to and from NRRs. This may eliminate the need to poll
NRRs for status information for synchronization purposes. This capability becomes especially important
when performing read/write access transfers to different speed target memories.
The RDY pin asserts (asynchronously) a logic low whenever the read/write access transfer has completed
without error and then deasserts when the IEEE 1149.1 state machine has reached the CAPTURE_DR
state.
The RDY pin is controlled by the TEST_CTRL register in the JTAGC module (see Section 29.3.1.4,
TEST_CTRL register (cut2/3 only)).
34.4 Register definition
This section provides a detailed description of the NPC registers accessible to the end user. Individual
bit-level descriptions and reset states of the registers are included.
Table 34-3 shows the NPC registers by index values. The registers are not memory-mapped and can only
be accessed via the TAP. The NPC block does not implement the client select control register because the
value does not matter when accessing the registers. Note that the bypass and instruction registers have no
index values. These registers are not accessed in the same manner as Nexus client registers. Refer to the
individual register descriptions for more detail.
Table 34-3. NPC Registers
Index
0
127
Register
Device ID Register (DID)
Port Configuration Register (PCR)
34.4.1 Register descriptions
This section consists of NPC register descriptions.
34-6
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor