PXS20RM Datasheet, PDF (1069/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Mode Entry Module (MC_ME)
32.3.2.1 Global Status Register (ME_GS)
Address 0xC3FD_C000
Access: User read, Supervisor read, Test read
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
S_CURRENT_MODE
100
00
reserved S_FLA
W
Reset 0 0 0 0 1 1 0 0 0 0 0 1 1 1 1 1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
S_SYSCLK
W
Reset 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
Figure 32-2. Global Status Register (ME_GS)
This register contains global mode status.
Table 32-4. Global Status Register (ME_GS) field descriptions
Field
Description
S_CURREN
T_MODE
Current device mode status
0000 RESET
0001 TEST
0010 SAFE
0011 DRUN
0100 RUN0
0101 RUN1
0110 RUN2
0111 RUN3
1000 HALT0
1001 reserved
1010 STOP0
1011 reserved
1100 reserved
1101 reserved
1110 reserved
1111 reserved
S_MTRANS Mode transition status
0 Mode transition process is not active
1 Mode transition is ongoing
S_PDO
Output power-down status — This bit specifies output power-down status of I/Os. This bit is
asserted whenever outputs of pads are forced to high impedance state or the pads power sequence
driver is switched off.
0 No automatic safe gating of I/Os used and pads power sequence driver is enabled
1 In SAFE/TEST modes, outputs of pads are forced to high impedance state and the pads power
sequence driver is disabled. The inputs are level unchanged. In STOP0 mode, only the pad power
sequence driver is disabled, but the state of the output remains functional.
Freescale Semiconductor
PXS20 Microcontroller Reference Manual, Rev. 1
32-13