PXS20RM Datasheet, PDF (478/1368 Pages) Freescale Semiconductor, Inc – PXS20 Microcontroller

Error Correction Status Module (ECSM)
21.4.2.3 Platform Crossbar Master Configuration (PLAMC)
The PLAMC is a 16-bit read-only register identifying the presence/absence of bus master connections to
the platform’s XBAR. The state of this register is defined by a module input signal; it can only be read
from the IPS programming model. Any attempted write is ignored.
See Figure 21-3 and Table 21-4 for the PLAMC definition.
Register address: ECSM Base + 0x0004
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R
0
0
0
0
0
0
0
0
AMC
W
RESET: 0
0
0
0
0
0
0
0
0
1
1
0
1
1
1
1
Field
AMC[n]
= Unimplemented
Figure 21-3. Platform Crossbar Master Configuration (PLAMC)
Table 21-4. PLAMC field descriptions
Description
XBAR master configuration
0 Bus master to XBAR input port n is absent
1 Bus master to XBAR input port n is present
21.4.2.4 Platform Crossbar Slave Configuration (PLASC)
The PLASC is a 16-bit read-only register identifying the presence/absence of bus slave connections to the
platform’s XBAR, plus a 1-bit flag defining the internal platform datapath width. The state of this register
is defined by a module input signal; it can only be read from the IPS programming model. Any attempted
write is ignored.
See Figure 21-4 and Table 21-5 for the PLASC definition.
Register address: ECSM Base + 0x0006
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R
DP64 0
0
0
0
0
0
0
ASC
W
RESET: 1
0
0
0
0
0
0
0
1
0
0
0
0
1
0
1
= Unimplemented
Figure 21-4. Platform Crossbar Slave Configuration (PLASC)
21-4
PXS20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor